New user self-registration is disabled due to spam. For an account please email bugs-admin@lists.llvm.org with your e-mail address and full name.

Bug 38861 - Emit third operand for the rdhwr instruction on MIPS64 < R6
Summary: Emit third operand for the rdhwr instruction on MIPS64 < R6
Status: RESOLVED FIXED
Alias: None
Product: libraries
Classification: Unclassified
Component: Backend: MIPS (show other bugs)
Version: trunk
Hardware: PC All
: P normal
Assignee: Simon Atanasyan
URL:
Keywords:
Depends on:
Blocks: release-7.0.1
  Show dependency tree
 
Reported: 2018-09-06 23:25 PDT by Simon Atanasyan
Modified: 2018-11-15 21:23 PST (History)
4 users (show)

See Also:
Fixed By Commit(s): r341919 r346739


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Simon Atanasyan 2018-09-06 23:25:12 PDT
MIPS ISAs before "Revision 6" do not support third operand for the rdhwr instruction. But LLVM generates three-operands version of the instruction on any MIPS64 ISAs. This is regression caused by r335162.

% cat test.ll
declare i8* @llvm.thread.pointer() nounwind readnone

define i8* @thread_pointer() {
  %1 = tail call i8* @llvm.thread.pointer()
  ret i8* %1
}

% llc -march=mips64 < test.ll
...
        rdhwr   $3, $29, 0

% llc -march=mips < test.ll
...
        rdhwr   $3, $29
Comment 1 Simon Atanasyan 2018-09-11 06:01:28 PDT
Fixed at r341919.
https://reviews.llvm.org/rL341919
Comment 2 Jessica Clarke 2018-11-03 09:35:01 PDT
This affects the release_70 branch; could it please be cherry-picked?
Comment 3 Sylvestre Ledru 2018-11-03 11:58:18 PDT
yeah, we should back port it. I have been affected by this in the debian packaging.
Comment 4 Simon Atanasyan 2018-11-03 14:00:01 PDT
Sure. I'm going to send request on backporting this and some other MIPS-related commits soon.